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A Guided Tour of FIPS 140-3 Validation Workflows
This eBook offers readers a step-by-step overview and practical breakdown of the workflows that accompany a FIPS 140-3 Validation from the lens of working with an accredited lab (NVLAP Lab Code: 200802-0) such as AEGISOLVE. This guide was authored by Travis Spann, Steve Hopper, and AEGISOLVE Team.
Software Development Lifecycle Excellence
This eBook outlines terms, information, and best practices related to the construction and verification phases of software development.
Crypto-Module Software lifecycle Development
This eBook outlines terms, information, and best practices related to software lifecycle development for cryptographic modules in a clear straightforward manner.
Secure Silicon FOR
This eBook explores the critical role of Secure Silicon in achieving compliance with DCI CTP (Digital Cinema Initiatives Compliance Test Plan).
Secure Silicon in
through the Lens of AI
The importance of secure silicon for ensuring the confidentiality, integrity, and availability of sensitive data and the proper functioning of digital cinema.
This eBook will help you understand the dynamic world of cryptographic algorithms and how they are evolving today and into the future.
FIPS 140-Series Best Practices for Software Development
Cut through complex language in FIPS 140-2 Appendix B with breakdowns and commentary at every critical junction for software development.
Understand the basic concepts of Configuration Management and the implications for FIPS 140.
Approved Security Functions
FIPS 140-2 vs FIPS 140-3
Side-by-side comparisons of FIPS 140-2 vs. FIPS 140-3 Approved security functions.
Zeroization: What? Why? When?
Zeroization - why it is necessary, and when to use it for improved cybersecurity.
10 Easy Steps to Cryptographic Algorithm Validation
Industry leader in providing Federal Information Processing Standards (FIPS) validations.
Entropy: A Primer on Conditioning Functions
Definitions, anecdotes, and parallel visualizations to explain entropy and how it can be used in cryptography.
5 Expert Tips for Multi-Chip Module Ruggedization
This guide will walk you through five expert tips for ruggedization of multi-chip cryptographic modules.
FIPS 140-2 Single-Chip Level 3 Physical Security
We simplify the breakdown of FIPS 140-2 Single-chip Level 3 requirements for physical security.
Fundamentals of Digital Signatures
Explore how digital signatures are made, and how to establish trust in a cyber world.
Other eBooks and Guides
Fault Injection and
Environmental Failure Testing
Fault induction is a process by which a device (and for the purpose of this discussion, in particular a cryptographic module) is forced to miscalculate defined operations, skip over required operations (such as password verification or self-tests), and exhibit other erroneous behaviors enabling the attacker (or tester) to gain access to sensitive data or unauthorized control of the device.
On September 1, 2015, DCI provided to SMPTE a memorandum regarding its investigation into the implications of SP800-56Br1 compliance, should NIST decide to enforce it. In May 2016, NIST announced that it would enforce SP800-56Br1. This document is an update to DCI’s earlier FIPS memoranda regarding impact to Media Block (MB) designs and the Key Delivery Message (KDM).